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[LUG] RISC-V gets SIMD vector stuff for smaller cores.
- To: Devon/Cornwall GNU LUG <list@xxxxxxxxxxxxx>
- Subject: [LUG] RISC-V gets SIMD vector stuff for smaller cores.
- From: Tom via list <list@xxxxxxxxxxxxx>
- Date: Fri, 8 Oct 2021 14:32:37 +0100
- Cc: Tom <madtom1999@xxxxxxxxxxxxxx>
- Content-language: en-GB
- Delivered-to: dclug@xxxxxxxxxxxxxxxxxxxxx
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https://www.theregister.com/2021/10/08/riscv_vector_instructions/
I played with similar stuff on RaspberryPi's and for the right
applications it really goes whooosh!
Tom te tom te tom
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