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On Mon, 15 Feb 2010, Simon Waters wrote:
Noticed on one of our servers (SC1425) that the L3 cache is disabled according to lshw (lshw -C memory).So far the DELL Poweredge Linux folk haven't come up with an answer. So anyone know under what conditions L3 cache is enabled/disabled in Linux?I assume this is deliberate, and due either to hardware choice, or SMP, or some other feature. But I can't find any discussion/explanation of L3 cache above and beyond what it is, and some Linux changelogs saying it needed disabling on some AMD chips.Machine has 2 x Intel(R) Xeon(TM) CPU 2.80GHz but I'd really like an explanation I can understand. Haven't tried reading the Linux source code, but the documentation didn't help me (although I might have missed some).
There are versions of the Xeon with no L3 cache present - I suspect you've got one - like me:
extract from /proc/cpuinfo on a Xeon box: (dual HT core) model name : Intel(R) Xeon(TM) CPU 3.00GHz stepping : 3 cpu MHz : 2992.647 cache size : 2048 KB *-cache:0 description: L1 cache physical id: 700 size: 16KB capacity: 16KB capabilities: internal write-through data *-cache:1 description: L2 cache physical id: 701 size: 2MB capacity: 2MB capabilities: internal write-back unified *-cache:2 DISABLED description: L3 cache physical id: 702 capabilities: internal write-back unified extract from /var/log/dmesg: CPU: Trace cache: 12K uops, L1 D cache: 16K CPU: L2 cache: 2048K This is an older Dell 2850.. I wonder if it's disabled because it's simply not present?Not sure how to positively identify the "core" name though - not sure if you can unless you take the lid & heatsink off...
Gordon -- The Mailing List for the Devon & Cornwall LUG http://mailman.dclug.org.uk/listinfo/list FAQ: http://www.dcglug.org.uk/linux_adm/list-faq.html